USB_OTG_HS2

Seva

Hello, I’m using APM32F407VE MCU with custom board. I’m trying to launch OTGH_MSC_HS2 example to get High Speed Usb, but a signal level on D-, D+ is 500mV and a device can’t recognise it. What a reason of this behaviour can it be? Maybe I need to change some settings in other registers? I changed HSE_VALUE from 8 to 25 Mhz and PLL_B from 8 to 25 for my board, also I cleared HSULPIEN bit in RCM_LPAHB1CLKEN (it is set by default and HS interface doesn’t work with it).

Yang Chao

Hi Seva, I have saw that you mention modifying HSE_VALUE and PLL_B, is the external oscillator on the custom board 25MHz? On our reference design of OTG_HS2, the OSC we use is 8MHz.

In the case of OTG_FS, PLLD should be set until OTG Clock = 48MHz, while the OTG_HS2 clock is given from the PHY IC, so the configuration is made by peripheral automatically.
Let me check the valid level for SE0 on APM32F407, I will reply later.
Meanwhile, can you give me your information on Geehy Official Page?
https://global.geehy.com/about/contact

Yang Chao

You can check the schematic first, the OTG_HS2 connection is not based on ULPI interface, it is using a internal PHY, OTG_HS are ULPI interface related. OTG_HS and OTG_HS2 cannot be activated simultaneously, and the interface varies.

Yang Chao

Hi Seva, if possible, please modify PLLD too, you can also find it in the system_apm32f4xx.c

/* Uncomment the following line if you need to relocate your vector Table in Internal SRAM. /
/ #define VECT_TAB_SRAM */

/* Vector Table base offset field. This value must be a multiple of 0×200. */
#define VECT_TAB_OFFSET 0×00

/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_B) * PLL_A */
#define PLL_B 25

/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLL_D */
#define PLL_D 7

#define PLL_A 336
/* SYSCLK = PLL_VCO / PLL_C */
#define PLL_C 2

Seva

I have these settings set. I tried set HSEBCFG bit in RCM_CTRL and there are more pulses on the data lines, but the amplitude is also 500 mV. I thought an oscilloscope probe pulled down it, disconnected it but there is also no connect (enumeration) with device. Meanwhile, USB_HS1 works great in Fullspeed mode, but we do need HS2 High speed mode

Yang Chao

Hi Seva, the 500mV signal is common for OTG High Speed detection, do you have Geehy’s evaluation kit APM32F407_EVAL with OTG_HS2? I would love to assist you with a kit that works OTG_HS2 perfectly for your reference.

Seva

Hi Yang Chao, thank you very much for your assistance. We just ordered APM32F407 Tiny Board, it will take some time until it reaches us. For now, on the custom board I tried to reset port (set and cleared PRST bit in OTG_HS1_HPORTCSTS register) holding MCU by debugger. In full speed mode, sof is generated continuously, but in HS mode there are few SOFs with delay 125 us between them then it breaks.