APM32F003F6P6 PWM channel 1 on Timer 2 doesn't work.

Alexander

Hello.
I Found that PWM channel 1 on on Timer 2 of APM32F003F6P6 doesn’t work, while channels 2 & 3
works correctly. As a test for this issue I used code:
#define PWM_DIV 4

void apm32f003_pwm_init(uint16_t lvl)
{
TMR2_OCConfig_T TIM_OCInitStructure;
TMR2_ConfigTimerBase(0, 0xFFFF/PWM_DIV); //divider, counter

TIM_OCInitStructure.channel = TMR2_CHANNEL_ALL; 
TIM_OCInitStructure.count = 4000;
TIM_OCInitStructure.mode = TMR2_OC_MODE_PWM1;
TIM_OCInitStructure.OCxOutputState = TMR2_OC_OUTPUT_ENABLE;
TIM_OCInitStructure.OCxPolarity = TMR2_OC_POLARITY_HIGH;
TMR2_ConfigOutputCompare(&TIM_OCInitStructure);
  
TMR2_DisableAutoReloadBuffer();
TMR2_Enable();

}

int main()
{
apm32f003_pwm_init(500);
while(1)
{

}
return 0;
}

What am I doing wrong? Or this is MCU feature?

Yang Chao

Hi Alexander,
I believe we have closed this issue by direct email contact. I will post my reply for the reference of our community visitors.

You can use APM32F003×4×6 datasheet as the datasheet of APM32F003F6P6, as you can find the part’s name in ordering information.

The User Manual lists all registers that you need to use, in case you miss any detail when you only refer to the code.

Please check: https://global.geehy.com/product/fifth/APM32F003

To activate the PD4 as TMR2_CH1, the Option Bytes - AFR is suggested to be cleared, you can refer to the code on Example “TMR2_OCActive” on APM32F00x_SDK_V1.4
`int main(void)
{
FMC_OPT();
APM_MINI_LEDInit(LED2);
APM_MINI_LEDInit(LED3);
APM_DelayInit(APM_DELAY_MS);

TMR2_Init();

while(1)
{
}

}

/*!

@brief TMR2 Init
*
@param None
*
@retval None
*/
void TMR2_Init(void)
{
TMR2_OCConfig_T ocConfigStruct;

/* Set counter = 1000, divider = 2⁴ */
TMR2_ConfigTimerBase(4, 1000);

ocConfigStruct.channel = TMR2_CHANNEL_1;
/* TMR2 CH1 delay = 400/1MHz = 400us */
ocConfigStruct.count = 400;
ocConfigStruct.mode = TMR2_OC_MODE_ACTIVE;
ocConfigStruct.OCxOutputState = TMR2_OC_OUTPUT_ENABLE;
ocConfigStruct.OCxPolarity = TMR2_OC_POLARITY_HIGH;
TMR2_ConfigOutputCompare(&ocConfigStruct);

ocConfigStruct.channel = TMR2_CHANNEL_2;
/* TMR2 CH2 delay = 600/1MHz = 600us */
ocConfigStruct.count = 600;
TMR2_ConfigOutputCompare(&ocConfigStruct);

ocConfigStruct.channel = TMR2_CHANNEL_3;
/* TMR2 CH3 delay = 800/1MHz = 800us */
ocConfigStruct.count = 800;
TMR2_ConfigOutputCompare(&ocConfigStruct);

TMR2_DisableAutoReloadBuffer();
/* Enable TMR2 */
TMR2_Enable();
}

/*!

@brief IO remapping
*
@param None
*
@retval None
*/
void FMC_OPT(void)
{
if(!(OB->AFR & 0×01))
{
FMC_Unlock();
FMC_EraseOptionByte();
NVIC_SystemReset();
}
}`