IEEE 1149.1 standard - JTAG BOUNDARY SCAN

antonio

 Hello everyone! Do APM32F407VGT6 microcontrollers supports JTAG boundary scan architecture (IEEE 1149.1 standard)? I can NOT use this option on this chip because it is does not work correctly оn this moment. (Special software does not detect short circuits and breakings on the PCBs). I can not see correct data strobes on TDO pin.

David

Can you provide a detailed description of your operating steps? We all support the JTAG protocol.

antonio

Hello!
For JTAG BOUNDARY SCAN operation I used special adapter (JTAG LIVE ADAPTER) and special software called «JTAG LIVE STUDIO».

Using pinouts are TRST, TDO, TDI, TMS, TCK and GROUND.
I connect microcontroller (APM32f407) to JTAG according to the scheme below:

Firstly, I must provide «Infrastructure test». This test was passed correctly:

Then I start up another test which detects logical state of any pin of microcontroller (high or low).
(The information received by software with TDO output pin from microcontroller.)
Also, I connect one pin of microcontroller to 3.3 Volts (51 pin) and there is a connection on the PCB between 51 and 42 pins.
(picture below)

Unfortunately, software does not detect high level of this pin (51) and connected pins (51-42), because it could not get correct information by TDO pin from APM32F407, as I see.
Another situation when I used STM32F407 microcontroller. Software detects logical state of this pin and connected pins correctly.

So, the questions are:
What is wrong with my operations? May be I used another bsdl-file for APM32F407? Does APM32F407 microcontroller support boundary scan architecture?
Thank you!

David

antonio Sorry, we have not verified or used JTAG LIVE STUDIO, so we cannot provide assistance in this regard. We suggest you directly inquire with the manufacturer of JTAG LIVE STUDIO. Is this functionality a must-have for developing your application? As for the pin states, you can directly measure them or read the relevant IO registers

antonio

No matter, what kind of software used to test device according to the IEEE 1149.1 standard. (JTAG LIVE STUDIO or JTAG PROBE or some else). This standard identically for all chips, if it is realised.

David

Excuse me, are you planning to adapt to the JTAG LIVE adapter? Our current supported IDEs (Keil, IAR, Eclipse) have relatively complete development support for APM32F407VGT6, and we currently do not have any other tools planned. If you encounter any problems during product development, please inquire directly. JTAG LIVE STUDIO or JTAG PROBE or some else is not necessary.